CD-ROM Appendix A, which is a part of the present disclosure, is a CD-ROM appendix consisting of 57 text files. CD-ROM Appendix A includes Verilog code (in a directory labeled VERILOG) for producing a controller chip as described below, initial code (in a directory labeled INITIAL) for controlling a microcontroller, and host computer code (in a directory labeled HDIAG) to create downloadable microcode and data as described below. The total number of compact disks including duplicates is two. Appendix B, which is also part of the present specification, contains a list of the files contained on the compact disk. The attached CD-ROM Appendix A is formatted for an IBM-PC operating a Windows operating system.
A portion of the disclosure of this patent document contains material which is subject to copyright protection. The copyright owner has no objection to the facsimile reproduction by anyone of the patent document or the patent disclosure, as it appears in the Patent and Trademark Office patent files or records, but otherwise reserves all copyright rights whatsoever.
These and other embodiments are further discussed below.
1. Field of the Invention
This invention relates to controllers and interfaces for flash memory controllers and, more particularly, to a flash memory controller with volatile program and data memory.
2. Discussion of Related Art
Flash memory is increasingly being utilized in small electronic devices as non-volatile data storage medium. Flash memory is also increasingly utilized as a replacement for conventional magnetic memory such as hard disks, floppy disks, and other non-volatile data storage media. Flash memory is a non-volatile semiconductor memory in which power consumption is small and data can be electronically rewritten. Further, flash memory stores data in the absence of power, is shock proof, and is light-weight and compact, thereby lending itself to many uses in the data storage area.
Flash memory stores data as charge on floating gates. Presence of charge on the floating gate represents one logic level while the absence of charge on the floating gate represents the opposite logic level. The state of a bit in flash memory, however, can not be simply changed. The bit must be erased and then rewritten. Because of the necessity of erasing bits in flash memory before a write to the flash memory can occur, data transfers to and from flash memory are handled differently than those in conventional magnetic memory which do not require an erase function before a new write can occur.
Flash memory utilized for data storage is usually arranged in blocks. Each block includes a plurality of addressable sectors, with each sector being within a physical block address PBA. In a conventional system, if the data or program stored within an address in a block is to be changed, the data in that source address is first read out of the flash memory and stored in a buffer latch. An erased block in the same flash device is identified as a destination block. Data, including the data to be retained from the source block, is then written into the destination block and the source block can be erased. In some systems, unchanged sectors can be transferred directly to the destination block without being buffered.
Conventionally, a computer system employs a dedicated controller for a flash memory drive. The host computer gives the controller read and write commands and the controller directly controls the reading from and writing to the flash memory itself. Furthermore, the controller performs memory management such as block erase, block reads, and block writes to the flash memory.
The controller, then, keeps track of blocks in use, blocks that have been erased, or blocks that have been damaged (or worn out). Therefore, the controller usually includes an address conversion table stored in memory separately from the flash memory in order to track data within the flash memory. Microcode executed by a microcontroller of the flash controller is typically stored in a non-volatile, non-erasable memory. The program memory, then, can not be easily modified. Furthermore, microcode appropriate for all configurations of the controller card needs to be stored on the controller card, leading to the need for a large amount of expensive storage capacity on the controller card.
Therefore, there is a need for memory controllers where the firmware for controlling the transfer of data between a host computer and a flash memory bank can be loaded into the memory controller from the host computer, increasing the versatility and decreasing the memory costs for the controller.
In accordance with the present invention, a Flash Disk controller that can download microcode is disclosed. The Flash Disk Controller interfaces between a host computer and a flash memory bank. The Flash Disk controller according to the present invention includes volatile memory banks for storing microcode and data where microcode can be downloaded from a host computer.
On controller startup, the controller proceeds to shadow code and attempts to load the microcode from the flash memory bank itself. If the microcode is not present in the memory bank or there is an error in downloading the microcode from the flash memory (i.e. shadowing), then the flash memory controller expects download of microcode from the host computer. In some embodiments, the host computer can independently initiate download of microcode from the host computer in order to replace microcode already stored in the controller.
In some embodiments, the host computer can download an initial code into the program memory. In some embodiments, during download of the initial code the microprocessor of the controller is suspended. When the initial code is executed by the microprocessor of the controller (i.e., by releasing the microprocessor), diagnostics are performed on the controller and the flash memory coupled to the controller to determine, for example, the flash memory configurations, defects in the flash memory, and other information. In some embodiments, the initial code executed by the microprocessor operates in response to commands from the host computer. The information obtained in the diagnostics routine is uploaded to the host computer so that the host computer can construct microcode tailored for that particular controller with that flash memory configuration. The newly constructed microcode is downloaded through the controller and stored in the flash memory. During the download process, the new microcode can be treated as regular data to be written into flash memory. In this fashion, the new microcode tailored by the host computer for the particular configuration can be loaded directly into the flash memory and the controller card reset to execute the new microcode. The controller card therefore requires much less memory space to hold the tailored microcode than would be needed if the microcode for all configurations were required to be stored.
In some embodiments, on startup, the controller reads the microcode from the flash memory and loads it into volatile memory. The controller, then, includes a microprocessor that executes the microcode from the volatile memory. In some embodiments, an error check can be performed on the microcode as it is loaded from flash memory into volatile memory. If an error is detected, the controller can switch to download mode in order to load new microcode into the volatile memory from the host computer. In some embodiments of the controller, the microprocessor is held in a hold mode until microcode is available in the volatile memory. In some embodiments, when the controller switches to download mode all commands from the host processor but the download command are either ignored or responded to with an error code. When the download is completed, the microprocessor is released to execute the code downloaded into volatile memory.
In some embodiments, the area of flash memory utilized for storage of the microcode is protected against accidental erasure. The protection can be performed by comparing a password stored in a password register with a stored password before the area of flash memory is written. If the passwords do not match, the controller can issue an error message. Therefore, in order to download the new microcode into the appropriate area of the flash, the appropriate password is loaded into the password register. Then the new microcode can be loaded into the appropriate area of the flash memory.
In some embodiments, the controller executes an interleaved storage system. The flash memory includes several flash memory chips which, in some embodiments, can be separated into multiple banks of flash memory chips. In some embodiments, data is written alternatively into sectors of different chips. In that fashion, during a read operation during the time that a first flash memory chip is loading data from a requested sector into a buffer of the first flash memory chip, the controller is asking a second flash memory chip for the sector corresponding to the next data in the requested data. Therefore, the read time can be shortened.
In some embodiments, the controller is programmed once during its operational lifetime. It can, for example, be programmed at the factory before shipping. In other embodiments, the controller can be reprogrammed multiple times during its operational lifetime.
The major advantages of downloadable microcode include the requirement of less memory in the controller and the versatility of downloading updated versions of the software. The lowered memory requirements lead to lowered cost of the controller and the ability to reload microcode leads to higher versatility of the controller. These and other embodiments are further discussed below with respect to the following figures.